Automotive

RECONFIGURABLE FLOATING-POINT ENGINES FOR THE REAL-TIME SIMULATION OF PECS: A HIGH-SPEED PMSM DRIVE CASE STUDY

Publication date : Jun 2011
Paper File : RECONFIGURABLE FLOATING-POINT ENGINES FOR THE REAL-TIME.pdf

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Author(s)

T. Ould Bachir, J.P. David, J. Mahseredjian, J. Bélanger, C. Dufour,

Abstract

The real-time simulation of PMSM drives enables thorough testing of control strategies and allows rapid deployment of automotive applications. However, the simulation of power electronic circuits (PECs) in the context of a PC-based simulation is challenging for several reasons, and imposes a limit in the 1-5 KHz range to the achievable switching frequencies. As FPGA devices gain computing power, conducting the real-time simulation of PECs on chip becomes an attractive alternative. This paper demonstrates the feasibility of high-performance floating-point calculation engines aimed for the real-time simulation of PECs on high-end and low-cost FPGAs as well. The paper discusses emerging paradigms for reconfigurable floating-point computing that favor optimal performance and offer near double precision arithmetic at a minimal hardware cost. A proof of concept is proposed through the on-chip simulation of a 3-phase IGBT inverter drive capable of handling very high switching frequencies.

Floating-Point Engines for the FPGA-Based Real-Time Simulation of Power Electronic Circuits

Publication date : Jun 2011
Paper File : Floating-Point Engines for the FPGA-Based.pdf

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Author(s)

Tarek Ould Bachir, Jean-Pierre David, Jean Mahseredjian, Christian Dufour,

Abstract

The real-time simulation of power electronic circuits is challenging for several reasons. A PC-based simulation can hardly achieve time-steps below 5-10 μs: this yields a limit on the maximal power electronic switching frequencies that can be accurately simulated using standard methods. This paper presents a design methodology for the hardware implementation of high-performance FPGA-based floating-point calculation engines aimed for the real-time simulation of power electronic systems. The power electronic circuits are modeled using the associated discrete circuit technique. A calculation time step of 100 ns is achieved for a boost converter, and the simulation results are validated against the SimPowerSystems library. The paper also discusses emerging paradigms for the FPGA-based floatingpoint computation that favor optimal performance and offer near double precision arithmetic at a minimal hardware cost.

The OP8710 High Voltage Interface Panel (HVIP) has the capability to provide digital signals of up to 250 VDC to equipment external to the Opal-RT Simulator.

Contact sales for more Info \| Request a Live Online DemoThis is a request to schedule an Online Demonstration of High Voltage Interface Panel (HVIP) - OP8710 with an Opal-RT Representative. \| Share Product

Real-Time Computer Simulation Helps Train Performance

OPAL-RT Europe designed the real-time computer simulator that ESIEE Amiens uses to simulate the interaction between catenaries and pantographs. A team of engineers is currently using the simulator to advise railway industries seeking to improve high speed train performance by optimizing electrical energy transmission thanks to a greater understanding of physical phenomenon such as contact loss, mechanical faults or atmospheric conditions.

March 23, 2011 - Montreal, Quebec

Bike wheel with an electric motor running on a Hardware-in-the-loop Simulator

Alan Soltis, Automotive Program Manager for Opal-RT Technologies, demonstrates a hardware-in-the-loop (HIL) simulator at the SAE 2011 Hybrid Vehicle Technologies Symposium in Anaheim, CA.

February 23, 2011 - Anaheim, CA, USA

The new OP5600 Chassis adds advanced monitoring capabilities and scalable I/O and processor power to OPAL-RT's line of real-time digital simulator systems including eMEGAsim, eDRIVEsim and eFLYsim.

Built using lower cost, high availability commercial-off-the-Shelf (COTS) components, the OP5600's modular and flexible design can be fully customized to meet specific I/O requirements and can be easily expanded as needed.

Key Features

Contains a powerful real-time target computer equipped with up to 12 3.3-GHz processor cores with the real-time operating system of your choice including QNX and Red Hat Linux.
Two user-programmable FPGA-based I/O management options available, powered by the Xilinx Spartan-3 or more powerful Virtex-6 FPGA processor.
Available expansion slots accommodate up to 8 signal conditioning and analog /digital converters modules with 16 or 32 channels each for a total of fast 128 analog or 256 discrete or a mix of analog and digital signals.
Acts as a single-target system or can be networked into a multiple-target PC cluster for complex applications capable of implementing large models with more than 3000 I/O channels and a time step below 25 micros.
Offers versatile monitoring on the front side, with RJ45 and mini-BNC, and standard connectors such as DB37 on the back side to connect user equipment for HIL simulation and testing. Status LEDs display FPGA synchronization status.

More Key Features

Contains up to 6 PCIe slot to connect a broad range of PCI and PCIe communication interfaces such as CAN, ARINC, MIL STD 1553.
Comes with the widest range of customizable signal generation and signal processing functions such as PWM, quadrature decoders and encoders, time-stamped DIO, frequency and duty measurement.

Download the
OP5600
User Manual.

Related Systems:
- eDRIVEsim
- eMEGAsim
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This is a request to schedule an online demonstration of OP5600 off-the-shelf Hardware-in-the-Loop (HIL) simulator with an Opal-RT Representative.

Ford Motor Company: Hybrid Driveline Design & Control

One of the most popular hybrid vehicles on the road today is the Ford Fusion Hybrid.

Today’s Power System Simulation Challenge: High-performance, Scalable, Upgradable,Affordable COTS-Based Real-Time Digital Simulators

Publication date : Dec 2010
Paper File : India Conference 2011_LAG_final.pdf

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Author(s)

Luc-André Gregoire, Laurence A. Snider, Jean Bélanger, Girish Nanjundaiah,

Abstract

This paper describes today's power system simulation challenge. Simulator technology has evolved from physical/analogue simulators (HVDC simulators, TNA’s) for electromagnetic transients and protection and control studies, to hybrid TNA/Analogue/Digital simulators with the capability of studying electro-mechanical transient behaviour [1], to fully digital real-time simulators. Today’s global power system infrastructure is rapidly changing towards increasingly distributed generation/distribution systems, and this transformation mandates expanded use of power electronic devices: HVDC, FACTS and interfacing devices for dc and variable-frequency power sources (photovoltaic, wind generation).

Hardware-in-the-Loop (HIL) to reduce the development cost of power electronic converters

Publication date : Jan 2011
Paper File : IICPE2010-HIL_multilevel_rectifier.pdf

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Author(s)

Luc-André Gregoire, Kamal Al-Haddad, Girish Nanjundaiah,

Abstract

This paper proposes a validation methodology for implementing solutions to challenges involved with power electronic converter design. Typically, the design process consists of first simulating the converter and then implementing it on hardware. Here, an intermediate step is added where the controller is connected to a real-time simulator before being connected to real hardware. This allows for virtual testing of scenarios that cannot be conducted with physical hardware without risking damage to the hardware. This technique will be demonstrated by implementing a new method of control, the drifting PWM, for a multilevel packed U-cell (PUC) converter. The drifting PWM allows for a slight variation in the switching state so that regulation of the auxiliary capacitor can be achieved. This method will be simulated offline and in real-time to demonstrate its long term reliability. Once fully functional, the controller is implemented on an FPGA board, from which it will control the real converter. Simulation results, as well as experimental results, are presented and compared. It is demonstrated that the HIL technique is a very effective tool for designing multilevel converter controllers.

Hardware-in-the-Loop Testing of Hybrid Vehicle Motor Drives at Ford Motor Company

Publication date : Oct 2010
Paper File : VPPC_2010-95-27745-final.pdf

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Author(s)

Linxiang Sun, Ji Wu, Christian Dufour,

Abstract

This paper describes the usage of Hardware-In-the-Loop technologies at Ford Motor Company for the development of hybrid vehicle cars. At the heart of these HIL tests are models of electric motor drives. Several challenges exist in executing these models in real-time, especially in faulty or uncontrolled modes. This paper describes the key features of these drive models, as well as examples of HIL tests conducted with these models by Ford Motor Company.