Jean Bélanger

Hybrid CPU-Core and FPGA based real-time implementation of a high frequency aircraft power system

Publication date : Nov 2015
Paper File : Not available yet

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Author(s)

T. Ilamparithi, Ohm Prakash, Jean Bélanger, Auteurs : K.S. Amitkumar,

Abstract

The concept of a More Electric Aircraft (MEA) power system is becoming increasingly popular, mainly due to its higher efficiency as compared to the conventional aircraft power system. This paper proposes and implements a section of an MEA system in real-time. The real-time implementation methodology presented in this paper utilizes both CPU-cores and an FPGA processor, depending on the time step requirement for each part of the proposed system. Several real-time implementation results are presented to validate the proposed implementation methodology. Further, dynamic studies and contingency studies are also presented to ensure that various bus voltages of the proposed MEA system are within specified ranges as per relevant standards.

FPGA-based Real-Time Simulation of a PSIM Model: An Indirect Matrix Converter Case Study

Publication date : Nov 2015
Paper File : FPGA-based Real-Time Simulation of a PSIM Model_IECON2015.pdf



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Author(s)

Tarek Ould Bachir, Sébastien Cense, Jean Bélanger, Handy Fortin-Blanchette, Asma MERDASSI,

Abstract

In this paper, an indirect matrix converter (IMC) which makes directly ac-ac power conversion, is modeled and simulated in real-time to demonstrate the capability of the new link between Opal-RT’s eHS (electric Hardware Solver) and the CAD tool PSIM. An automatic methodology for the real-time simulation of power converters from PSIM circuit designs to FPGA is presented and discussed. A time-step of 250 ns is achieved on an FPGA computing engine developing up to 25.6 GFLOPS of processing power. Real-time simulation results are compared against PSIM as an offline validation tool, showing close match between the FPGA-based simulation and the reference.

Validation of Modular Multilevel Converter Real-Time Simulator in DC Pole-Pole Fault Scenario

Publication date : Sep 2015
Paper File : MMC_cigre 2015.pdf



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Author(s)

OPAL-RT; Wei Li, Jean Bélanger,

Abstract

Real time simulator becomes an important tool for modular multilevel converter (MMC) manufacturers to test and validate their control and protection systems in hardware-in-the-loop (HIL) setup. The simulation of large MMC converters with several hundreds of cells per valve is, however, very complex and time consuming due to the large number of states and switches requiring re-computing of the total system states at each change of switch status. This is a challenge for off-line simulation tools to achieve an acceptable processing time and even more challenging for real-time simulators, which must complete the full model calculation within a few microseconds. Consequently, commercial off-line power system simulation software and real-time simulator solvers must optimize and simplify, to a certain extent, the MMC system model to achieve acceptable simulation times. In some literature, it was believed that the aggregated capacitor MMC model would be accurate enough to simulate the system dynamics of the MMC terminals and their adjacent networks, if the valve voltage balancing controller is not tested. Although the real time simulator using detailed submodule MMC model implemented on FPGA has already been used in and contributed to the Nan’ao and Zhoushan multi-terminal MMC projects, China, there is still skepticism about simulation fidelity: simulation errors could be introduced due to the model simplifications. Recently a Chinese MMC manufacturer tested their controller with two commercial HIL real-time simulators. In the DC pole-pole fault scenario, discrepancies were found in the DC fault current evaluated by different simulators using different model simplifications required to achieve real-time for HIL controller and protection testing. Because the DC fault current is important for calculating protection settings, the authors performed an investigation to analyse the effect on model simplifications, which could affect the DC fault current seen by the controller and protection systems, and propose a method to determine the possible range of expected DC fault current curve without the knowledge of the detailed controller. The analysis presented is applicable for both off-line and real-time simulation tools.

Factory Acceptance Test of a Five-terminal MMC Control and Protection System using Hardware-in-the-loop Method

Publication date : Jul 2015
Paper File : Factory Acceptance Test of a Five-terminal MMC Control and Protection System using Hardware-in-the-loop Method.pdf



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Author(s)

Yunlong Dong, Weihua Wang, Wei Li, OPAL-RT, NR Electric, Jie Tian, Jean Bélanger, Gang Li,

Abstract

Being the first five-terminal Modular Multilevel Converter (MMC)-based HVDC project in the world, the control and protection system must be validated under various operation modes as well as contingency at the factory acceptance test. This paper presents the configuration and performance of a hardware-in-the-loop (HIL) test platform that is based on a multi-rate real-time simulator using commercial-off-the-shelf architecture. The MMC sub-module model is implemented in field programmable gate array (FPGA) boards with a computation cycle of 500 ns, while the rest of the power system is simulated on the central processing unit (standard multi-core CPU) with a time-step of 30 μs. The State-space Nodal (SSN) interface is used to couple the models simulated on FPGA and on CPU. In addition, a communication protocol based on Giga-bit Ethernet is designed to connect the actual valve balancing controller with the real-time simulator. Results from the factory acceptance test are presented in this paper.

Development of Real Time Digital Simulator for Self-Commutated SVC to Suppress Voltage Flicker

Publication date : May 2014
Paper File : IPEC2014.pdf



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Author(s)

Yutaka Terao, Yoshinori Tsuruma, Yasuhiro Shishida, TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL, Tomotsugu Ishizuka, Teruo Yoshino, Fumio Aoyama, Yutaka Kato NEAT CO., Jean Bélanger,

Abstract

This paper deals with real-time simulation of a self-commutated static var compensator (SVC) system for steel plants with electric arc furnaces (EAFs). A voltage flicker often occurs due to the unsteady current and changes in reactive power. Simulation of the flicker suppression system is quite complicated, and new simulation techniques should be developed. We constructed a main circuit and control system models of an SVC for real-time simulation with RT-LAB®. The real-time simulation results were compared with actual operational data of a steel plant system equipped with two furnaces. Finally, we showed that we successfully developed a real-time simulation system for SVC systems.

An Induction Machine and Power Electronic Test System on FPGA

Publication date : Aug 2014
Paper File : FPGA_Induction_Machine_Electrimacs2014_DufourCense.pdf



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Author(s)

Sébastien Cense, Jean Bélanger, Christian Dufour,

Abstract

This paper presents an FPGA test system composed of an Induction Machine (IM), configurable as a Doubly-Fed Induction Machine (DFIM) or squirrel-cage induction machine, along with power electronic models suitable for virtual motor drive control development. The IM model is designed so that all parameters can be modified online. The power electronic part is customizable using a variable topology FPGA solver called Electric Hardware Solver (eHS). The system is designed for fast design iteration process by allowing circuit and parameter modification with a unique bitstream. The system allows control engineers to validate production controllers in real-time using a virtual IM.

Model-In-the-Loop Real-Time Simulation in Phasor Domain

Publication date : Aug 2014
Paper File : ISIE2014_OPAL RT.pdf



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Author(s)

Vahid Jalili-Marandi, Jean Bélanger, Fábio Jose Ayres,

Abstract

The ePHASORsim tool offers real-time phasor domain simulations for large-scale power systems. Applications include contingency studies, testing control devices, operator training, and SCADA system tests. This paper describes a new application of this tool for Model-In-the-Loop simulations. Two test experiments are shown in this paper to demonstrate the accuracy and advantages of utilizing ePHASORsim for this purpose. The Matlab SimPowerSystems® toolbox is used to validate the results.

Power Electronics for renewable energy systems, transportation and industrial applications

Publication date : Aug 2014
Paper File : Not available yet

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Author(s)

Luc Andre Gregoire, Kamal Al-Haddad, Jean Bélanger, Handy Blanchette, Christian Dufour,

Abstract

Chapter 18: Real-time Simulation of Modular Multilevel Converters (MMCs) Real-time offers several advantages to speed up the development of new product. One of these advantages being the possibility to test and develop controllers when the hardware is not yet available. This is a serious advantage in the case of high-order multilevel converter, like modular multilevel converter (MMC) topology. Its physical size could raise serious issues for most laboratories, without even mentioning the cost to build such a complex structure. It can also be useful to analyze the interaction between several MMCs and conventional high-voltage DC (HVDC) systems installed on the same power grid. Furthermore, it can perform factory acceptance test of the control system before the installation in the field. Nowadays, real-time simulators are often used simply to accelerate simulations, which could take several hours for simulation runs of a few seconds with a power grid having tow or three converter stations using conventional single-processor simulation software. This chapter introduces bases of real-time simulation: its advatanges and its constraints. Using these bases, real simulation of an MMC will be undertaken. This topology is made of many identical cells connected in series. Its modularity makes it suitable for various applications from medium voltage in a drive system using only a few cells to a large HVDC transmission system containing a wide range of cells. Connecting many of these cells in series reduces the voltage level that each sustains, decreasing the price of each components, reducing the switching losses and smaller and smaller dV/dt at its AC bus, while producing a sinusoidal waveform with a very low total harmonic distortion (THD) eliminating the use of bulky reactive component filter.

Modular Multilevel Converter Model Implemented in FPGA for HIL Test of Industrial Controllers

Publication date : Aug 2014
Paper File : Modular Multilevel Converter Model Implemented in FPGA for HIL Test of Industrial Controllers.pdf



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Author(s)

Wei Li, Sisounthone Souvanlasy, Pierre-Yves Robert, Luc-André Gregoire, Jean Bélanger,

Abstract

Since Modular Multilevel Converters (MMC) have a sophisticated control, the real time simulation platform becomes critical for hardware-in-the-loop (HIL) test of the actual controllers in various scenarios before commissioning. This paper presents a multi-rate real time simulator that is able to simulate electromagnetic transients of MMC systems and connect to industrial controllers through fiber optics and copper wires for HIL tests. The MMC is implemented in field-programmable gate array (FPGA) with a sub-μs time step and the rest of the power system is simulated in the central processing unit (CPU) with a time step of 10~50 μs. Input and output (I/O) drivers are implemented in the same FPGA for a fast-rate and low-latency communication. Each FPGA accommodates up to 1530 sub-modules (SM), and multiple FPGA connected to one simulator can simulate MMC with more SM and multi-MMC systems. The performance is demonstrated in a 1500-SM MMC study case.

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