Publication date : Apr 2011
Paper File :
Validation of a 60-Level Modular Multilevel.pdf
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Author(s)
Wei Li,
Luc-André Gregoire,
Laurence Snider,
Jean Bélanger,
Abstract
In this paper, full real-time digital simulation of a static modular multilevel converter (MMC) HVDC link interconnecting two AC networks is discussed. The converter has 60 cells per arm; each cell has two power switches with antiparallel diodes and one capacitor. The simulated model can be used to study the natural rectifying mode, which is very important in the energizing process of the converter, whether a ramping voltage or a charging resistance is used. The model also incorporates a simple controller to show the system behavior in different operating conditions. The converter model and the controller are simulated on two independent real-time simulators and connected though their respective IO and physical signal cables to perform Hardware-in-the-Loop testing. All capacitor voltages are supplied to the controller using digital to analog converters. Firing signals from the controller are sent using digital signals with opto-couplers, as would be the case with a real setup. By doing so, a Hardware-in-the-Loop (HIL) simulation is obtained. The main challenges of this setup are the very high number of IOs, which reaches over 730, considering both controller and converter, and the processing power required to simulate the 360 cells within a small time-step of 50 μs or less, as required for electromagnetic transient analysis. The simulation is achieved with a time-step of 20 μs using 10 INTEL 3.2-Ghz processor cores. Different faults are applied to determine their effects on the controller and the converter. In order to produce results that are as realistic as possible, a saturable transformer is used; the impact is particularly noticeable during faults and unbalanced load. The real-time digital simulator used is based on MATLAB, SIMULINK, SimPowerSystems and eMEGAsim.
